1. Field of the Invention
The present invention relates to an electrically data-rewritable non-volatile semiconductor memory device such as a NAND-type EEPROM.
2. Description of the Related Art
An EEPROM has been known in the art as electrically erasable programmable one of semiconductor memories. Among those, a NAND-type EEPROM, comprising NAND cells, each including a plurality of serially connected memory cells, each serving as the unit of one bit storage, has received attention because it can be highly integrated. The NAND-type may be utilized in a memory card to store image data output from a digital still camera, for example.
A memory cell in the NAND-type EEPROM has an FET-MOS structure that includes a floating gate and a word line stacked, with interposition of insulator films, on a semiconductor substrate that serves as a channel region. A NAND cell includes a plurality of serially connected memory cells in such a manner that adjacent ones share a source/drain (see JP-A 2002-313089, FIG. 32, for example). The source/drain is an impurity region that serves as at least one of a source and a drain.